Misfetch

It also shows the conditional branch misprediction rate ( due to both misprediction and target address misfetch), the return misprediction rate, and the BTB miss rate .

All branches and calls cause a misfetch when the branch is not present in the BTB.

Unfortunately, the typical optimizations for cachelike structures, such as larger capacity or associativity, will not help in decreasing misfetches.

Sometimes you had to work the weather side on account of that being too far to get across the sand to a wreck from the leeward. That wasn't very nice, because you hadn't got no shelter and if you made a misfetch you'd soon be up alongside the wreck yourself.

However, a single misfetched instruction can cause the system to begin executing code from nonexistent or improper memory locations, and it is unlikely to recover on its own.

With Missf and Missp the percentages of branches that are misfetched and mispredicted, respectively (some branches can be both, as shown in two rows of Table 4.2), the contribution of the CPI due to branch execution, or the branch execution penalty bep expressed as a number of cycles, can be written in a first approximation (see the exercises) as […]

The number of cycles wasted on each mispredicted or misfetched branch is larger than in a RISC processor.

Furthermore, the direct container handling at shipside can also be controlled by the ACYAS in order to prevent containers from misfetching.